We’ve seen some of AMD’s recent plans for late 2008 and early 2009 and if everything stays on the schedule the third revision of the K10 core should launch in early 2009.

The first revision is also known as Revision B and it includes a 65nm K10 core with 2MB L3 cache and a Silicon on insulator process.

The second will go into production in Q4 2008 and its first baby will be the Deneb quad-core and the process behind it is called 45nm K10.5 Rev C. This is the first 45nm process from AMD, but we’ve learned that this is just the beginning. The second rev C core is the Propus 45nm Quad-core without L3 cache, while Deneb will have 6MB L3.

In 2009, AMD plans to migrate to the 45nm K10.5 Rev D and this new process will still be based on Silicon on insulator, but this time they will use a high-K process. AMD calls these cores Hydra and it will enable up to eight cores with 6MB shared L3 cache and more L2 per core.

AMD plans to start with Rev D cores in Q1 2009, but this will very likely be a pilot production run, while the real products based on it will come later in 2009.