We wrote that AMD’s 12-core Magny-Cours CPU will use a multi-chip module here but, like most of the time, AMD has its own way of doing it.

Intel uses MCM, Multi-chip module, connects two cores dual-cores in quad-core and it uses Northbridge to talk to the chip; while AMD will use its own Direct Connect Module approach.

Before we start to explain how this actually works, let us underline that AMD will use two six-core Sao Paolo chips to make the 12-core Magny-Cours, but as we said, in its own way.

AMD’s Direct Connect Module uses coherent Hypertransport link to interconnect the cores. It all happens in the chip and AMD doesn’t need a Northbridge for the inter-chip communication, at least not the way that Intel does, and therefore makes things faster.

Theoretically, a coherent HT link should help these two six-cores work together and the CPUs will believe that they actually have 12MB of cache and not 6MB+6MB. Intel’s Kentsfield and Yorkfield still suffer from this problem, as with 45nm Yorkfield 6MB+6MB of cache remains 6MB+6MB, while in AMD’s case 6MB+6MB should become real 12MB of shared cache.

The only big issue is that this Magny-cours 12-core 45nm CPU comes in 1H 2010 and Intel’s inferior stuff is available today. Intel’s Dunnington 6-core should launch in a few months and AMD won’t really have a six-core to compete with Intel until mid to late 2009.

It won’t be easy for AMD, as the way it looks AMD will lose a lot of its server market to Intel’s Nehalem and Dunnington.