IBM has unveiled a prototype embedded SRAM chipset that is capable of reaching speeds beyond 6 GHz, nearly two times the speed of currently available SRAMs. Embedded SRAMs hold data that is frequently accessed by the processor. The faster the access, the faster the data transfer from SRAM to CPU.
Researchers have long sought methods to overcome the effects of process variability, especially variations in the device turn-on characteristics when a device is placed among an array of other devices. Those device variations can cause loss of stored data, rendering the devices "unstable."
IBM researchers have discovered a novel hardware-based solution to eliminate "half select" problems, improve Vmin and increase performance for multi-port applications by using 8T SRAM arrays. Half-select occurs when the ‘word line’ is “on” and ‘column select’ is “off,” which leads to instability.
A novel write-byte concept generates ‘local-write word’ lines, which are only selected when the ‘write control’ for the selected block is “on,” avoiding half-select disturb conditions. Thus, the separate read port eliminates half-select during ‘read,’ and write byte eliminates half-select during ‘write.’