the fact that AMD's upcoming products based on the Bulldozer and Bobcat architecture will appear sometime in 2011, AMD has finally shed some official light regarding the actual details about the architecture. The Bobcat will be the base of the first Fusion chip, codenamed Ontario, coming from AMD, and you can expect this one to show up in early 2011 if all goes well, while the Bulldozer will also appear in 2011, although first as a part of AMD's server and high-end dekstop products.
The Bulldozer architecture introduces two integer execution cores, something that we haven't seen so far, while sharing the rest of the components of components when needed. Bulldozer is built in 32nm SOI process technology. During the press briefing, AMD has pointed out that every Bulldozer "module" will be counted as a dual or two core, which means that simply if you pair up eight Bulldozer modules, you get a sixteen cores, as on the Interlagos, which will be one of the server parts that will show up using the Bulldozer architecture.
The Bulldozer architecture is promising a 50 percent better performance when compared to the today architecture, all thanks to the better power management, better performance thanks to the noted "multi-threading done right" architecture design, and of course, 32nm manufacturing process. Of course, Bulldozer also has a future in Fusion market, but that will come at a later date once this architecture takes strong roots in server market.
The Bobcat architecture aims at the netbook and notebook market and AMD markets this architecture as a flexible, low power and small architecture that can manage sub one watt core that has up to 90 percent of the performance when compared to the current K8-based mainstream chips. Of course, the sub-1W claim means that you have to lower the voltages and performance leaving it to be suitable only for netbooks and even smaller devices such as MIDs, but it's nice to see how low can it go when it comes to power consumption.
Despite its small size, the Bobcat will feature complete ISA support including SSE1-3, SSE3 ISA instructions and virtualization. It will have a out-of-order exectuion engine, AMD64 64-bit ISA and will feature 32kb of L1 cache.
The Bobcat architecture will show up in the Ontario APU, which will become AMD's first Fusion chip. The Ontario was pushed ahead of Llano, which based on AMD's K8-architecture, and should be ready for early 2011 timeframe.
Although, there has been a lot of questions regarding the upcoming products based on these architectures, AMD has decided to keep this briefing limited to the architecture itself although we are pretty sure that we'll see more and more info as we draw closer to the end of the year. AMD feels quite confident regarding these two architectures and for now everything looks promising and quite good.