Featured Articles

Nvidia GTX 980 reviewed

Nvidia GTX 980 reviewed

Nvidia has released two new graphics cards based on its latest Maxwell GPU architecture. The Geforce GTX 970 and Geforce GTX…

More...
Nvidia adjusts GTX 980 and GTX 970 pricing

Nvidia adjusts GTX 980 and GTX 970 pricing

It appears that Nvidia has been feeling the pulse of the market and took some note from comments regarding the original…

More...
iPhone 6 and 6 Plus reviews are up and they are good

iPhone 6 and 6 Plus reviews are up and they are good

Apple is dancing the same dance year after year. It releases the iPhone and two days before they start shipping it…

More...
Amazon announces three new tablets

Amazon announces three new tablets

Amazon has just released three new tablets starting with the $99 priced 6-inch Kindle Fire HD6. This is a 6-inch tablet…

More...
PowerColor TurboDuo R9 285 reviewed

PowerColor TurboDuo R9 285 reviewed

Today we will take a look at the PowerColor TurboDuo Radeon R9 285. The card is based on AMD’s new…

More...
Frontpage Slideshow | Copyright © 2006-2010 orks, a business unit of Nuevvo Webware Ltd.
Friday, 26 July 2013 10:29

Intel promises 512-Bit AVX instructions

Written by Nick Farrell



Find Allen key 23b

Intel has warned that it is about to release its AVX-512 instructions which it claims will offer the highest degree of compiler support by including an unprecedented level of richness in the design of the instructions.

According to Tom’s Hardware the software can pack eight double precision or sixteen single precision floating-point numbers, or eight 64-bit integers, or sixteen 32-bit integers within the 512-bit vectors. This means you can process twice the number of data elements of the AVX/AVX2 with a single instruction and four times that of SSE.

Intel AVX-512 has 32 vector registers each 512 bits wide, eight dedicated mask registers. This means that there are 512-bit operations on packed floating point data or packed integer data. This allows for embedded rounding controls, broadcast,floating-point fault suppression, and memory fault suppression.

Tom notes that the 32 ZMM registers represent 2K of register space. Intel AVX-512 will be seen in the Intel Xeon Phi code name Knights Landing, and will also be supported by some future Xeon processors scheduled to be introduced afterwards.

More here.

blog comments powered by Disqus

 

Facebook activity

Latest Commented Articles

Recent Comments