VIA appears to be thinking that there is money to be made in SSD design.

We got a clue this morning when an outfit called Tensilica sent us a press release saying that VIA has selected Tensilica's Xtensa dataplane processors (DPUs) for a system-on-chip (SOC) design for solid state drives (SSDs). VIA felt that Tensilica's DPUs would provide over four times the performance of competing processors on key algorithms used to benchmark competitive alternatives and went for it.

But what this seems to be telling us is that VIA has worked out that there is shedloads to be made on the back of SSDs Tensilica's DPUs allow designers to customize the IP core, mix both control and signal processing, and add high-bandwidth connectivity to increase performance without increasing the clock speed. For example, designers can use single-cycle bit field manipulation and arithmetic instructions along with multiple simultaneous single-cycle table lookups to achieve over 10 times the efficiency of other processors. This not only increases IOPS, but also significantly reduces the energy consumed and the complexity of the SOC design itself.

Jiin Lai, VIA's CTO is expecting a lot of competition an the SSD market and he thinks there is a significant advantage using Tensilica DPUs to lower the power and increase the throughput of his  products.