Intel’s 14nm+ Kaby Lake refresh does not provide too many benefits over Skylake in terms of generational performance, with most reviews citing an average 10 percent improvement between SKUs (e.g. Core i5 6200U vs Core i5 7200U). Intel claims that between the Core i7 6500U to the Core i7 7500U, users can expect is a 12 performance increase in productivity and business applications based on SYSmark 2014, and a 19 percent increase in web performance based on WebXPRT 2015.
Earlier this March, the company retired the “tick-tock” development model that it has used since 2007, replacing it with a three-step “process-architecture-optimization” model. During the announcement, it explained to shareholders that the migration from one process node to the next has become significantly more challenging than anticipated in recent years with the introduction of tri-gate transistors and other 3D design techniques. By extending the lifecycle of each manufacturing process, the company’s engineers can now spend more time optimizing existing designs starting with the 14nm process. In this case, Broadwell, which launched for notebooks in Q4 2014 through the first half of 2015, was the process redesign, followed by Skylake in the second half of 2015 being the architecture redesign. In the third generation, Kaby Lake is the optimization focused on power savings, more efficient hardware-accelerated video playback, and further refinements to the Turbo Boost technology.
When Broadwell was designed, Intel manufactured taller and thinner fins on the chips to increase drive current and performance. This new pitch and height size reduced overall capacitance, which led to the first increase in power savings on the 14nm process node. With Skylake, Intel then introduced "fine-grain" power gating, a feature which only powers on the parts of the CPU that are in active use. The architecture also introduced Speed Shift, a technology that sends voltage and frequency handling from the operating system back to the processor. The main benefit is that the chip can now control these adjustments much more quickly than the OS, with commands that can take just 1ms to complete versus a previous 20 to 30ms depending on software responsiveness.
With Kaby Lake, Intel decided to use the same instructions per clock (IPC) as Skylake, with the main architectural differences being taller fins (once again) and a wider gate pitch. The result is basically silicon with less transistor density and more room to breathe. Intel says the wider gate pitch allows heat from each transistor to distribute more openly, giving more room for higher frequency adjustments, though at the expense of possibly having spare unused silicon from the wider pitch.