Featured Articles

Intel plans Haswell refresh in Q2 2014

Intel plans Haswell refresh in Q2 2014

Intel has been executing its tick tock strategy flawlessly since January 2006 and now there is some indication that we might…

More...
Xbox One demoed running GTX card

Xbox One demoed running GTX card

It looks like the Xbox One just cannot catch a break. We have stumbled upon a report claiming that Xbox One…

More...
Haswell Pentium and Core specs surface

Haswell Pentium and Core specs surface

Haswell is out and now we have the complete specs for Intel’s first batch of fourth generation Core parts, as well…

More...
EVGA GTX 770 ACX 2GB previewed

EVGA GTX 770 ACX 2GB previewed

Nvidia is hoping that the Geforce GTX 770 will be a very popular product, and EVGA obviously share this view, as…

More...
Gainward GTX 770 Phantom reviewed

Gainward GTX 770 Phantom reviewed

Gainward has now officially unveiled its custom version of the Geforce GTX 770, the Gainward GTX 770 Phantom. Based on the…

More...
Frontpage Slideshow | Copyright © 2006-2010 orks, a business unit of Nuevvo Webware Ltd.
Tuesday, 01 May 2012 10:42

Nvidia patents parallelisation of GPU data

Written by Nick Farrell



Keep all your processors hierarchical


Graphics dalek Nvidia has filed for an extension to its patents  for a hierarchical processor array.

It looks like Nvidian thinks that Patent 7,634,637 can be extended to cover some new ideas it has to fix a core design problem  hat results in wide and ineffective graphics rendering pipelines. Nvidia has applied for a patent that describes the idea is that there are two or three tiers of processing cores with dedicated functions. The pipelines would include different shaders, such as a vertex shader unit, a geometry shader, a pixel shader and some others.

In the patent Nvidia says that "each massively parallel stage in a stage-by-stage pipeline tends to provide little granularity of control of portions of each parallel stage. Each "massively parallel stage becomes unwieldy and prohibitively time-consuming to design". As the massively parallel stage struggles during operation to find sufficiently wide units of work to fully occupy the data path its usage is cut back.

Nvida's cunning plan is to keep parallelisation efficient, by using multiple levels of processing hierarchies with multiple classes of graphics operations being associated with a different stage of graphics processing. Each level would include a module that is capable of processing all graphics functions. There would also be one top-level component that is able to distribute certain classes of work to lower level classes of processors.

It also comes out with a third-level class in the processor hierarchy that would be reserved for general purpose computations, and a specialised graphics function module that can perform graphics operations carried out based on frame buffer data.

The result is a design which is configured to execute a large number of threads in parallel.

More here.

Last modified on Friday, 04 May 2012 08:24

Nick Farrell

E-mail: This e-mail address is being protected from spambots. You need JavaScript enabled to view it
blog comments powered by Disqus

To be able to post comments please log-in with Disqus

 

Facebook activity

Latest Commented Articles

Recent Comments