Published in Processors

Embedded Silvermont Atom spec leaks

OoO execution, two to four cores

Valley View, Intel’s future SoC platform, should deliver significant performance gains over existing chips and thanks to CPU World, we have some gritty and geeky details.

The chips will be based on the new Silvermont architecture, with out-of-order execution and 7th generation Ivy Bridge class graphics. Unlike previous Atom architectures, some Valley View SKUs will be quad core parts, but most should stick to two cores.

The new architecture will target multiple markets, including smartphones, tablets, mobile and desktop. Of course, there will also be a number of embedded parts and the latest leak deals with them, but it gives us a rough idea of what to expect on other fronts.

Embedded chips will feature a dual-channel memory controller, 1MB of L2 cache and there will be three SKUs, all clocked at 1.7GHz or faster. The top quad-core SKU will support Burst technology with a top frequency of 1.9GHz, all in a 12W TDP envelope. The two other SKUs will have a TDP of 10W or lower.

The entry level part is a single-core clocked at 1.3GHz to 1.6GHz. The mid range SKU is a dual-core clocked at 1.2GHz to 1.5GHz, with graphics capable of hitting 533MHz. The top SKU is a quad-core clocked at 1.7GHz to 2GHz, with a 700MHz GPU clock.

The base graphics clock for all three chips is 300MHz, but bear in mind that we are dealing with embedded chips, which usually don’t need fast graphics. It is possible that they are downclocked for the sake of efficiency and we could see higher clocks in SKUs designed for the consumer market.

Last modified on 13 February 2013
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