Featured Articles

Nvidia Shield 2 shows up in AnTuTu

Nvidia Shield 2 shows up in AnTuTu

Nvidia’s original Shield console launched last summer to mixed reviews. It went on sale in the US and so far Nvidia…

More...
AMD CSO John Byrne talks ARM

AMD CSO John Byrne talks ARM

We had a chance to talk about AMD’s upcoming products with John Byrne, Chief Sales Officer, AMD. We covered a number…

More...
AMD Chief Sales Officer thinks GPU leadership is critical

AMD Chief Sales Officer thinks GPU leadership is critical

We had a chance to talk to John Byrne who spent the last two years as Senior Vice President and Chief…

More...
OpenPlus One $299 5.5-inch Full HD phone

OpenPlus One $299 5.5-inch Full HD phone

OnePlus is one of the few small companies that might disrupt the Android phone market, dominated by giant outfits like Samsung.…

More...
KFA2 GTX 780 Ti Hall Of Fame reviewed

KFA2 GTX 780 Ti Hall Of Fame reviewed

KFA2 gained a lot of overclocking experience with the GTX 780 Hall of Fame (HOF), which we had a chance to…

More...
Frontpage Slideshow | Copyright © 2006-2010 orks, a business unit of Nuevvo Webware Ltd.
Monday, 20 February 2012 16:44

VIA getting into SSD design

Written by Nick Farrell



It is the newest bandwagon to jump on


VIA appears to be thinking that there is money to be made in SSD design.

We got a clue this morning when an outfit called Tensilica sent us a press release saying that VIA has selected Tensilica's Xtensa dataplane processors (DPUs) for a system-on-chip (SOC) design for solid state drives (SSDs). VIA felt that Tensilica's DPUs would provide over four times the performance of competing processors on key algorithms used to benchmark competitive alternatives and went for it.

But what this seems to be telling us is that VIA has worked out that there is shedloads to be made on the back of SSDs Tensilica's DPUs allow designers to customize the IP core, mix both control and signal processing, and add high-bandwidth connectivity to increase performance without increasing the clock speed. For example, designers can use single-cycle bit field manipulation and arithmetic instructions along with multiple simultaneous single-cycle table lookups to achieve over 10 times the efficiency of other processors. This not only increases IOPS, but also significantly reduces the energy consumed and the complexity of the SOC design itself.

Jiin Lai, VIA's CTO is expecting a lot of competition an the SSD market and he thinks there is a significant advantage using Tensilica DPUs to lower the power and increase the throughput of his  products.

Nick Farrell

E-mail: This e-mail address is being protected from spambots. You need JavaScript enabled to view it
blog comments powered by Disqus

To be able to post comments please log-in with Disqus

 

Facebook activity

Latest Commented Articles

Recent Comments