NEO Semiconductor reckons it has a new way to pack DRAM like NAND, and it says the first proof-of-concept chips have now checked out.
The idea, branded 3D X-DRAM, was unveiled in 2023 to tackle the DRAM capacity bottleneck by using a 3D NAND-style architecture rather than the usual flat layouts.
NEO has been pushing two main cell designs for 3D X-DRAM, built to slot into different products depending on what you are trying to accelerate.
The 1T1C cell, short for one transistor and one capacitor, is pitched as a high-density DRAM option that lines up with mainstream DRAM and HBM roadmaps.
The 3T0C cell, meaning three transistors and zero capacitors, is tuned for current-sensing work and is being aimed squarely at AI and in-memory computing.
NEO has talked up IGZO channel technology, claiming simulations show retention times up to 450 seconds, cutting refresh power by a hefty margin.
Those same simulations, using TCAD modelling, are claimed to show 10-nanosecond read and write performance while keeping that long retention window.
The manufacturing sales pitch is that it uses a modified 3D NAND process with minimal changes, so existing fabs could adapt without rebuilding everything from scratch.
NEO is positioning the tech as an alternative to high-bandwidth memory, which is fast but pricey, fiddly to validate and not much fun to produce at scale.
Instead of stacking multiple DRAM dies like HBM, 3D X-DRAM is designed to build a monolithic structure within a single die with multiple layers.
The firm says the proof-of-concept chips show it can be manufactured using existing 3D NAND infrastructure, swapping in DRAM layers where NAND would normally go.
NEO’s first reported proof-of-concept results are read/write latency: <10 ns and endurance: >10¹⁴ cycles, with a batch of disturbance and retention claims at 85°C.
It lists data retention: >1 second at 85°C, bit-line disturbance: >1 second at 85°C and word-line disturbance: >1 second at 85°C, framed as 15× better than the 64 ms JEDEC standard.
As AI and HPC memory demand climbs, the company is betting that higher-density DRAM becomes less optional and more mandatory, even if the hype merchants cannot stop yelling.
Intel is working on a similar idea called ZAM, but neither approach is in production yet, and the gap between a lab win and a server rack can be brutally long.
