Arm has rolled out its Neoverse CSS N4, a highly configurable server compute subsystem aimed squarely at increasingly hungry agentic AI infrastructure.
Writing in its blog, Arm claims the new design can be configured with between eight and 128 CPU cores per die and is Arm’s first N-series CSS capable of running at up to 3.8 GHz.
It supports LPDDR6 memory and PCIe Gen 7 connectivity, giving chip designers considerably more bandwidth and I/O headroom for accelerators, networking and other data centre plumbing.
Arm claims CSS N4 delivers up to twice the performance of Neoverse CSS N3, 1.25 times the performance per watt and 1.75 times the memory bandwidth. Those are Arm’s numbers, naturally, so prospective customers may want to wait for silicon before ordering the champagne.
The subsystem is intended for companies building their own processors rather than buying a finished Arm CPU. Customers can configure core counts, cache capacity, memory, I/O, accelerator links and chiplet interfaces around their designs.
CSS N4 can be used for single-die or multi-chiplet systems and is aimed at cloud servers, networking kit, data processing units and specialised AI infrastructure. Arm reckons the growing fashion for agentic AI will put rather more work on CPUs than conventional inference did.
AI agents increasingly have to retrieve data, call tools, deal with databases, coordinate accelerators and communicate with other agents rather than merely throw a prompt at a GPU and hope something sensible comes back. That creates more CPU-side computation and data movement, particularly where large numbers of jobs must run concurrently.
Arm is pitching CSS N4 at throughput-heavy workloads where performance per watt and compute density matter more than winning an isolated benchmark. The company says the architecture can provide the control-plane processing needed for high-bandwidth networking while maintaining fast links to AI accelerators.
It can serve as the CPU foundation for DPUs handling networking and security tasks, accelerating AI key-value caching and isolating agent workloads from the host system. Arm supplies CSS as a pre-integrated, validated subsystem rather than leaving customers to bolt together cores, interconnects, system IP, and software themselves.
The idea is to let chip designers spend more time adding their own clever bits and less time discovering at 3 am that two supposedly compatible blocks refuse to speak to each other. CSS is delivered as RTL that can be pulled into modern electronic design automation flows, with implementation guidance, third-party IP interoperability support, and an integrated software stack.
Arm says customers can boot Linux on the subsystem for validation and software development before their final chip turns up.
Its broader Neoverse CSS programme is intended to cut design risk and shorten the route to production silicon by handling much of the necessary but undifferentiated integration work.
Arm is pairing CSS N4 with its AGI CPU for customers that do not fancy designing their silicon. The AGI CPU is the ready-made option for more latency-sensitive agentic workloads, while CSS N4 gives hyperscalers and silicon builders room to customise processors for their particular racks.
Arm says OpenAI, Meta, Cloudflare, Oracle, SAP, Lenovo, Supermicro and Verda are developing systems or services around the AGI CPU.
Google Cloud is running agent sandboxes using its Arm-based Axion processors on Google Kubernetes Engine, while Microsoft is using its Cobalt 200 CPUs for sandbox tool execution. Nvidia’s Vera CPU is another Arm-based design intended for agentic workloads.
ByteDance’s cloud division, Volcano Engine, plans to bring what Arm describes as the first agentic sandboxes powered by the AGI CPU to market, offering secure and elastic environments for running AI agents at scale.
Arm is making increasingly bold claims about how far its architecture has penetrated the data centre. Citing IDC, the company says Arm-based rack-scale servers have overtaken x86 as the dominant CPU platform in accelerated computing systems.
