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Intel waves overtime cash at Ohio

Intel is throwing overtime bonuses at its Ohio fab while its EMIB-T packaging dream still has a substrate-shaped headache.

This would appear to be part of a cunning plan to get the new Ohio fab complex running by 2031. The company is apparently willing to splash out on generous bonuses to make that happen.

At the same time, the wind is blowing in Chipzilla’s favour on EMIB-T packaging. The only awkward bit is that substrate yield remains the last stubborn piece refusing to behave.

Intel’s Ohio fab appears to remain on schedule, while EMIB-T is being positioned as a rival to TSMC’s CoWoS-L.

For those not in the know,  Chipzilla is building a gigantic 1,000-acre fab complex in Ohio for its ‘Angstrom era’ process nodes. Those are better known as 18A and 14A. The aim is to operationalise high-volume 14A production by 2031.

TSMC has reportedly been developing an EMIB-like advanced packaging system to sit alongside its bulkier CoWoS-L offering. That suggests the packaging bunfight is getting more interesting than the usual process-node chest beating.

Chipzilla’s EMIB links multiple silicon chips, or chiplets, inside one processor package. It does this with tiny silicon bridges embedded directly in the organic substrate.

High-density micro-bumps are placed only at the edges where the chiplets meet the bridge. That keeps the clever interconnect trick tucked away where marketing drones cannot make it sound mystical.

EMIB-T pushes the idea further by using through-silicon vias drilled directly through the embedded silicon bridges. These vertical channels let power and high-speed signals travel from the package bottom through the bridge and into processors or memory above.

That enables 3D stacking, which is where packaging stops being the boring end of chipmaking. Chipzilla claims EMIB-T is about 50 per cent cheaper than TSMC’s CoWoS.

Chipzilla expects to offer EMIB-T packaging in bulk in 2027. Package yields are already said to be nearing 90 per cent, which is not bad for something this fiddly.

The remaining drag is substrate yield, which is reportedly stuck at 50 per cent. The substrate used in EMIB-T starts with a base organic panel. It has precision-drilled cavities where the silicon bridges are placed, with Ibiden as the primary anchor supplier.

Other suppliers include Shinko, Unimicron and AT&S. The dielectric build-up layers are insulation layers laminated over the embedded bridges and use Ajinomoto Build-up Film.

The silicon bridges themselves contain through-silicon vias to route power vertically. In other words, the whole thing is clever, expensive and not exactly forgiving when yields go sideways.

That substrate remains the drag on Chipzilla’s plan for volume EMIB-T packaging services. Still, Unimicron recently said EMIB-T is an early-stage platform, with rapid ramp-up and yield improvement as the priorities.

Chipzilla has spent years trying to persuade the world that its foundry comeback is more than an expensive corporate séance. Ohio and EMIB-T give it something tangible, assuming the substrate gremlins stop chewing the furniture.

 

 

TOPICS:
14a  ·  18a  ·  advanced packaging  ·  chiplets  ·  CoWoS-L  ·  EMIB-T  ·  Intel  ·  Ohio fab  ·  TSMC

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