Intel’s Nova Lake could finally make AVX-512 useful on consumer chips by giving P-cores and E-cores matching support.
Hot Hardware reports that the groundwork appeared in November, when Intel released GCC patches. Those patches showed Nova Lake would support AVX-512, the newer AVX10.2 version, APX and MOVRS.
Now, according to notorious Intel leaker Jaykihn, that applies to both the P-core and E-core architectures. That matters because developers can use the new instructions on consumer chips without worrying about which core gets the job.
Chipzilla CPUs use the x86 instruction set, named after the 1978 8086 processor that started the whole circus. Since then, the instruction set has gained dozens of extensions from Chipzilla and AMD, helped along by their deep cross-licensing arrangement.
One of the messier additions was AVX-512, which extended Advanced Vector Extensions to support 512-bit vectors. The name is not exactly helpful because AVX-512 includes plenty of instructions that have nothing to do with 512-bit vectors.
The exact instruction blocks supported on a processor are not always obvious. That made AVX-512 a badly fragmented feature and a pain for developers who prefer chips to behave predictably.
In 2023, Chipzilla announced AVX10 as an attempt to clean up the AVX-512 mess and give it a less misleading name. The important shift was from flag-based enumeration to version-based enumeration.
That should mean far less confusion about what instructions a given chip supports. It is a rare outbreak of clarity from the instruction-set swamp.
Despite arriving in 2016 and appearing in several generations of desktop and laptop CPUs, AVX-512 vanished from Chipzilla client processors after 11th-gen Core Rocket Lake.
The main reason was the hybrid CPU design. Chipzilla’s E-core architectures have not supported AVX-512, and Windows cannot move live code to another CPU core just because the current one lacks an instruction.
Chipzilla’s answer was to disable the whole extension. It was crude, but there was little mainstream software using AVX-512 at the time, so it was probably the least daft option.
By 2027, when Nova Lake is expected to arrive, that software picture looks very different. AVX-512 is widely used in scientific computing, and important software such as ffmpeg has begun using it.
It is turning up in gaming too, but the big driver is AI. AVX10 includes instruction blocks such as AVX-VNNI, which can deliver huge speed boosts for AI workloads running on CPUs.
The gap is large enough that Chipzilla gave it a marketing name, DLBoost, because apparently even instruction sets need branding now.
Nova Lake is expected to bring AVX-512 support to the Chipzilla-using masses through AVX10.2. AMD has offered AVX-512 support since Ryzen 7000, so Chipzilla is hardly early to this particular party.
The more interesting claim is that Nova Lake will reportedly have native 512-bit execution. That would mean full-fat AVX-512 vector execution units, which many people had not expected.
The AVX10.2 standard only requires 256-bit execution, while 512-bit width support remains optional. Latest reports suggest Nova Lake could match AMD Zen 5’s level of AVX support, which would be decent news for competition.
Nova Lake already has plenty of rumoured bait, including massive core counts, larger IPC gains, optional huge caches and a platform that may survive more than one CPU upgrade.
The chips are expected to launch very late in 2026 or, more likely, early in 2027.
