Chinese domestic memory outfits are sprinting towards high-bandwidth memory to feed the country’s AI boom, but the country’s biggest DRAM maker is stumbling with HBM3, right when everyone needs it to work.
Semicon China 2026 featured vendors showcasing plenty of shiny DRAM talk, including JCET’s HBM3e packaging based on 2.5D stacking. It is pitched at 960 GB/s bandwidth per stack and a 20 per cent interconnect density jump versus earlier generations.
JCET’s problem is it cannot manufacture the thing at scale, so it has to punt production out to someone else.
CXMT, the country’s top DRAM player, has its own headache, with HBM3 reportedly stuck in testing and nowhere near real volume production. This is meant to be its fourth-generation HBM product, once floated for a first-half 2026 debut, yet there are reportedly no mass-production orders in place.
According to ZDNet CXMT’s technological progress has been rapid, but the HBM3 mass production schedule keeps being pushed back. Based on development progress, mass production this year appears unlikely.
So far supplies and materials are only good enough for sampling, not a proper ramp. That pushes the project into the second half of 2026, which isn’t great timing, given that the rest of the DRAM world is already lining up HBM4.
HBM4 is expected to matter for upcoming data centre monsters like Nvidia’s Vera Rubin and AMD’s MI400, with HBM3E still getting pumped out for the next wave of AI boxes. If CXMT cannot get HBM3 out the door, domestic AI chipmakers get squeezed into awkward choices, buying from abroad or slowing their own launches while the lab work drags on.
