WD executive vice president of memory technology, Dr. Siva Sivaram, said the tech was doubling the density from its first 64-layer architecture in July 2016.

“This is a great addition to our rapidly broadening 3D NAND technology portfolio. It positions us well to continue addressing the increasing demand for storage due to rapid data growth across a wide range of customer retail, mobile and data centre applications," he said.

Western Digital developed the tech with its chum Toshiba, bringing out its first 64-layer 3D NAND technology in July 2016 and the world's first 48-layer 3D NAND technology in 2015.

It is not clear when the 512 gigabit 64-layer 3D NAND chip will show up in products. Western Digital will be discussing the breakthrough today at the International Solid State Circuits Conference (ISSCC) in San Francisco.