We wanted to learn the story behind the K10 and what happened before huge delays and TLB debacle and we got some juicy details as to what actually happened.

Years before K10 was announced, AMD had made a decision to go for a 65nm-based native quad-core and the company had hoped that it could pull this together. OEMs were the ones that pushed AMD in this game, as these server guys wanted a native quad-core. Native quad-core would run much faster than two dual-cores with a bridge that interconnects them, but at the same time native quad-core was tough with big, 65nm transistors.

AMD had to overcome silicon on insulator limitations, as this process is good for good yields, but it also brings some electronic problems and limitations. AMD's competition warned Fudzilla about potential clock limitations, leakage and the bottom line was that it would be very tough and expensive to make a 65nm native quad-core.

Unfortunately for AMD our sources were right, as AMD was stuck with up to 2.5GHz speed, 125W TDP and the project was delayed for more than six months due to the TLB and clock related issues. At the end it launched a chip with TLB errata, slow performance that didnt do well on the market.

Big server OEMs wanted a native Quad-core at 65nm in 2007 and Intel managed to deliver such a chip roughly a year later, something that we all know as Nehalem-E a server chip. IT is not coincidence that Nehalem looks like Deneb 45nm with hyperthreading support as Intel and AMD shared a lot of design ideas with its multi core designs.