TSMC’s next generation 16nm process has reached an important milestone – 16nm FinFET Plus (16FF+) is now in risk production.
Needless to say, 16FF+ comes a few quarters after the 16nm rollout, expected in Q1 2015. TSMC hopes to start churning out 50,000 16FF wafers in Q2 2015. As for the Plus process, it is still more than a year away in terms of availability and it will be followed by 10nm, which is expected to materialise in late 2016.
TSMC says the improved 16FF+ process can deliver a 40% performance boost compared to its planar 20nm SoC process (20SoC), with a 50% reduction in power consumption.
"Our successful ramp-up in 20SoC has blazed a trail for 16FF and 16FF+, allowing us to rapidly offer a highly competitive technology to achieve maximum value for customers' products," said Mark Liu, president and Co-CEO for TSMC.
"We believe this new process can provide our customers the right balance between performance and cost so they can best meet their design requirements and time-to-market goals."
The first 16FF+ chips are expected to tape out in late 2015 and TSMC expects the volume ramp will start in mid-2015.