A trillion transistors by 2030
Chipzilla appears to be beavering away at a new form of processor which can handle a trillion transistors by 2030.
Foveros 3D stacking with Hybrid CPU for 4+1 CPU and up to 64 EUs GPU
We have been hearing about Intel's Lakefield CPUs for quite some time, and these combine one big with four small CPU cores on a small footprint, thanks to the 3D stacking Foveros technology. Now, Intel disclosed a bit more information, including two SKUs, aimed at ultra-mobile small form-factor premium laptops.
Chief architect: Expect 30 to 40 percent uplift
Intel has shared a few more details about the Intel Tremont low power Microarchitecture at the Linley Fall Processor Conference in Santa Clara and we had the chance to chat with Stephen Robinson, Senior Principal Engineer and Intel Tremont Chief Architect.
10nm and 22nm on the 3D Foveros package
Raja Koduri, ex ATI, AMD, Apple and now Intel’s senior vice president of Core and Visual Computing, outlined a strategic shift in the company’s design and engineering models.