The company revealed at the RISC-V Summit this month that while it was more famous for its proprietary CUDA cores with their own instruction set architecture and support for various data formats, are actually controlled by custom cores based on the industry-standard RISC-V ISA.

Compute resources and power management to display engines and security are  overseen by 10 to 40 custom RISC-V cores developed by Nvidia, depending on the chip's complexity.

Nvidia began transitioning from its proprietary microcontrollers to RISC-V-based microcontroller cores in 2015, and according to an Nvidia presentation at the RISC-V Summit, nearly all of its MCU cores are now RISC-V-based.

Nvidia has developed at least three RISC-V microcontroller cores: NV-RISCV32 (RV32I-MU, in-order single-issue core), NV-RISCV64 (RV64I-MSU, out-of-order dual-issue core), and NV-RVV (RV32I-MU, NVRISCV32 + 1024-bit vector extension).

These cores, along with others, replaced the proprietary Falcon microcontroller unit based on a different instruction set architecture. Additionally, Nvidia has created over 20 custom RISC-V extensions to boost performance, functionality, and security.

The most crucial RISC-V-based component of Nvidia GPUs is its embedded GPU System Processor (GSP). According to Nvidia's website, the first GPUs to employ RISC-V-based GSP were built on the Turing architecture. This GSP offloads Kernel Driver functions, reduces GPU MIMO exposure to the CPU, and manages the GPU.

Since MCU cores are universal, they can be deployed across Nvidia's entire product range. Consequently, in 2024, Nvidia is projected to ship around a billion RISC-V cores integrated into its GPUs, CPUs, SoCs, and other products, highlighting the prevalence of custom RISC-V cores in Nvidia's hardware.

Nvidia ships millions of GPUs annually. In 2023 alone, the company shipped 31 million desktop discrete GPUs a similar number of standalone GPUs for laptops, several million data centre GPUs, and a variety of other hardware. Each of Nvidia's chips contains multiple RISC-V cores.