ARM's NPU IP offering was first announced early last year and was known as “Project Trillium". ARM has officially branded the IP as the Ethos line-up, and the N77 has been the main product.
The Ethos-N77 now publicly changes its specs compared to what had been revealed last year by allowing for configurable 1 -4MB SRAM. ARM said that customers needed more memory bandwidth for processing these mesh networked NPUs, as DRAM bandwidth doesn’t scale up in the premium segment as fast as the core count does. The flagship IP offers up to 4TOPS processing power at 1GHz clock and has a respectable 5TOPS/W efficiency.
The NPUs all share the same MAC computation engine (MCE) and programmable layer engines (PLE). The MCE consists out of 128 MAC units alongside a PLE. An MCE and PLE, plus SRAM, make up a computation engine (CE). This scaling block differs between the N77, N57, and N37, coming in 16x, 8x, and 4x CE count configurations.
The new NPUs have already been licensed and delivered to customers.
ARM had announced the new Valhall architecture in the new Mali-G77. Arm has revamped its graphics ISA and computation microarchitecture.
Today, ARM said it was adopting the new Valhall architecture in the mid-range, starting with the new Mali-G57.
Improvements compared to a G52 with three execution engines per core (3EE) promise 1.3x better performance in a similar core configuration, 30 percent better energy efficiency, and 30 percent better silicon density, due to the better performance.
ARM is also flogging a new mid-range Mali-D37 DPU. The new IP is based on the “Komeda” architecture, which was first introduced in the Mali-D71 and its follow-up, the Mali-D77 announced this year. Then new DPU targets resolutions of 2K and FHD and promises to take up only <1mm² on 16nm.