Published in PC Hardware

TSMC says it is on track for 5 nm

by on29 October 2019

Arriving on platform 9

TSMC vice chairman and CEO C.C. Wei announced the company's plans for 5 nm are on track, which means High Volume Manufacturing (HVM) on the node is expected to be achieved by 2Q 2020.

Wei said that the company had increased expenditures in ramping up its various nodes from an initially projected $10 billion to something along the lines of $14 billion - 15 billion. The company is really banking on quick uptake and design wins on its most modern process technologies - and the increased demand that follows.

TSMC's 5 nm process (N5) uses extreme ultraviolet lithography (EUVL) in many more layers than its N7+ and N6 processes, with up to 14 layers being etched in the N5 silicon compared to five and six, respectively, for its "older" N7+ and N6 processes.

Wei said that as the company increases capital expenditure in acquiring EUVL-capable equipment that sets up its production nodes for the market they foresee will take up market share for chips in 2020, the company is optimistic it can achieve growth of five to 10 percent.


Last modified on 29 October 2019
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