Intel kills off RISC-V developer environment
Can't find a way on Pathfinder
While the world+dog is looking closely at RISC-V, Chipzilla has killed off its open source RISC-V developer environment, Pathfinder.
HiFive Pro P550 development board ready for the summer
RISC-V business
SiFive and Intel have said that their HiFive Pro P550 development board is on track for release during summer.
Google comes up with new OS for RISC-V
KataOS is more secure
Search engine outfit Google has shown off its KataOS, a new secure operating system for embedded open-source RISC-V chips.
Google experiments with RISC-V
All our AI will be open saucy
SiFive RISC-V chips are being used by Google to run some of its AI workloads and tested in Google datacentres.
RISC-V is go-to chip for space
Headed to the Moon and Mars
RISC-V ISA has been selected to provide the core CPU for NASA's next generation High-Performance Spaceflight Computing processor (or HSPC).
SiFive RISC-V CPU cores to go to space
NASA taps SiFive and Microchip for its High-Performance Spaceflight Computer (HPSC)
SiFive has announced that its RISC-V-compatible CPU cores will be the backbone of NASA's new High-Performance Spaceflight Computer (HPSC). The new chip will be developed under a three-year contract between NASA and SiFive and Microchip.
Alibaba releases RISC-V development platform
Edge SoCs coming
Alibaba Cloud has released a development platform to help engineers building high-performance Systems-on-Chip (SoC) silicon based on the RISC-V open architecture.
First RISC-V laptop arrives
It will probably get better
The world’s first RISC-V laptop has just hit the shelves to a collective yawn from reviewers.
Alibaba Cloud porting Android to RISC-V
Unable for the US to stop it
Alibaba Cloud has advanced its work to port Android to the RISC-V in a move which will stop the US from preventing China getting its paws on US tech.
Intel cuddles up to RISC-V
Starts a $1 billion fund
Chipzilla has announced a new $1 billion fund on February 7 to build a foundry innovation ecosystem and will collaborate with several RISC-V standard IC design firms.