AMD has space-grade Versal AI Adaptive SoC
The first Space-Grade Versal Adaptive SoCs Enabling On-Board AI
Processing in Space. Processing AI in space. Having a space-grade chip requires a lot of commitment and preparation for the radiation shielding, but AMD’s Xilinx managed to ship its first space-ready Versal AI cores.
Xilinx introduces Versal Premium adaptable accelerator for Core network
Designed for high bandwidth core and 5G tasks
Imagine an FPGA that can replace 22 currently shipping FPGA Adapters and provide a high bandwidth needed for the Internet and 5G demand of the future? That seems the best way to visualize Versal Premium, as this is a product design to address the explosion of data and bandwidth growth.
Versal Adaptable is a monolithic chip
Xilinx plays with 3D packaging since 2008
Victor Peng, the CEO of Xilinx, has just announced that the 35 billion transistor Versal is a monolithic chip. Without saying the exact number, he did mention that at 7nm, the Versal 7nm 35 billion transistor chip is smaller than traditional GPUs.
Xilinx CEO shows off its Versal board
7nm up and running
Last year Victor Peng CEO of Xilinx announced a 7nm ACAP platform and today we had a chance to see the chip as well as the development board on the stage.
Xilinx Developer Forum 2019 starts October 1
Adaptive intelligent world
Last year was the first time that Xilinx held a massive Xilinx Developers forum, and on October 1 and 2, the company plans the annual event over again. Victor Peng, President, and Chief Executive Officer is expected to give us an update on adaptable intelligent world vision.
First customers getting Versal ACAP
7nm first adaptive compute platform
Xilinx has confirmed that the Versal, product developed under Everest condemned was taped out last year, and today the company has confirmed that the first tier-one customers are getting the first Versal AI core products.
Xilinx 7nm Versal taped out last year
37B transistor chip sampling in weeks
The transformation of Xilinx took the company’ revenue to over three billion for the first time in history, and the big bets that CEO Victor Peng made are starting to pay off. Victor confirmed at the recent company’s financial analyst event that a 7nm chip codenamed Everest and branded as Versal was taped out last year.
Xilinx codename Everest is Versal
Swiss knife for heterogeneous AI, cloud, 5G
The wait is finally over, what Victor Peng the CEO of Xilinx announced as the Everest, will now be branded as the Versal. This is shaping up to look like the Swiss knife of heterogeneous computing, addressing some key markets including AI, cloud, network infrastructure, 5G, automotive, and much more.