According to Tom’s Hardware Wassick used infrared imaging and found the same type of 3D V-Cache connection points used on AMD's Zen 3 and Zen 4 architecture.
AMD has made no public plans to expand its 3D packaging capabilities beyond vertically stacked cache and Wassick cannot say if these TSV connection points will be used for caching purposes. However, it makes sense that these connection points would be used with some sort of 3D cache to increase gaming performance and/or compute performance.
It also tallies with rumours that AMD would add 3D V-Cache tech to its GPUs after them being a success on Ryzen and EPYC CPUs.
The technology relies on a hybrid bonding technique that fuses an additional 64MB slab of cache on top of a Ryzen or EPYC compute die to increase L3 cache capacity. Currently, this 3D stacking technique has allowed AMD to double the amount of L3 cache available to its desktop Ryzen 9 7900X3D and 7950X3D parts while tripling it on its Ryzen 7 5800X3D, 7800X3D consumer chips and EPYC Milan-X server processors.
It is unclear how 3D V-Cache would operate in a GPU. Having more cache capacity would enable faster processing of cache-sensitive workloads since the GPU has to make fewer trips to its slower GDDR6 memory. This can be seen in AMD's Infinity Cache in the RX 6000 series where it allowed AMD to use slower GDDR6 memory and retain the same performance as Nvidia's RTX 30 series GPUs with their power-hungry GDDR6X memory.